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Verification Techniques for System-Level Design

By (author) Masahiro Fujita, By (author) Indradeep Ghosh, By (author) Mukul Prasad

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normal price: R 3 238.95

Price: R 3 076.95

| book description |

This book will explain how to verify SoC (Systems on Chip) logic designs using “formal” and “semiformal” verification techniques. The critical issue to be addressed is whether the functionality of the design is the one that the designers intended. Simulation has been used for checking the correctness of SoC designs (as in “functional” verification), but many subtle design errors cannot be caught by simulation. Recently, formal verification, giving mathematical proof of the correctness of designs, has been gaining popularity.For higher design productivity, it is essential to debug designs as early as possible, which this book facilitates. This book covers all aspects of high-level formal and semiformal verification techniques for system level designs.

| product details |



Normally shipped | This title will be printed on demand for your order. Delivery will be 6 weeks or less.
Publisher | Elsevier Science & Technology
Published date | 12 Dec 2007
Language |
Format | Hardback
Pages | 256
Dimensions | 235 x 191 x 0mm (L x W x H)
Weight | 670g
ISBN | 978-0-1237-0616-4
Readership Age |
BISAC | technology / electronics / circuits / general

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Normally shipped | Usually dispatched in 3 to 4 weeks as supplier is out of stock
Readership Age |
Normal Price | R 3 932.95
 Price | R 3 735.95 | on special |

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Helgoland: The Strange and Beautiful Story of Quantum Physics

Carlo Rovelli
Paperback / softback
208 pages
was: R 295.95
now: R 265.95
Available from overseas. Usually dispatched in 3 to 6 weeks

The Order of Time

Carlo Rovelli
Paperback / softback
224 pages
was: R 295.95
now: R 265.95
Available from overseas. Usually dispatched in 3 to 6 weeks
Originally published in Italian: L'ordine del tempo (Milan: Adelphi Edizioni, 2017).

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was: R 295.95
now: R 265.95
Stock is usually dispatched in 6-12 days from date of order
 
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